Computer Architecture
Fall 2021
Week 1:
Introduction.
Recap exercises.
Week 2:
Using the Modelsim Altera Starter Edition environment.
Combinational circuits modeling using hardware description languages.
Week 3:
Using structured procedures for modeling synchronous sequential designs.
Week 4:
Building a hierarchical design using hardware description languages.
Writing testbenches.
Week 5:
Designing of parameterized modules using Verilog.
Week 6:
Implementing finite state machines in Verilog.
Week 7:
Arrayed instantiation and generate constructs.
Week 8:
Interfacing digital components for data transfer.
Week 9:
Structures for iterated addition.
Week 10:
Error detection architectures.
Week 11:
Design of a CORDIC unit architecture.
Week 12:
Sequential multiplier for Sign-Magnitude numbers.
Flavius Opritoiu
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