Simulating a quartus project (Quartus version used 7.2)
Make sure all design errors are solved before continuing.
Click the File -> New menu, and select from the Other Files tab the Vector Waveform File option.
For simulating the top-level entity, name the waveform file the same as the project.
Set the ending simulation time from the menu Edit -> End Time
Enter the maximum simulation time
Right click in the first column of the waveform file and select Inser -> Insert Node or Bus menu.
Click the Node Finder button on the Insert Node or Bus window
List all pins in the design (the design must be first compiled) by clicking the List button. Make sure the Pins:all filter is selected.
Double click all the signals you are interested in simulating to add them to the Selected Nodes colum
Press Ok button of the Node Finder window.
Press Ok button of the Insert Node or Bus window.
Create the waveform for an input signals by right-clicking on it and selecting one option from the Value menu. (logic low - implicit; logic high, clock, random, ...)
After constructing waveforms for each of the input signals, the simulation is started usin the Start Simulation button.
Automatically, the simulation report is opened, containing the waveform of all signals (input and output). The cursor can be used to view the logic levels at a particular moment of time.